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SoC Verification Engineer

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职位信息
  • 启动日期:2018-09-14
  • 招聘部门:生产制造
  • 汇报对象:无
  • 下属人数:无
  • 职位描述:
  • JOB DESCRPTION:
    o Be responsible for the development of the verification platform (SIM/EMU) including the scripts developing,
    SOC testbench building, evaluating the cutting edge of verification methodology and integrating them into the
    platform.
    o Be responsible for the SoC database management, SoC simulation bring up, regression and coverage
    collection and analysis
    o Implement the soc functional verification tasks from verification plan definition to tests development on both
    sim and emu platform.
    o Implement the gate level simulation, Low power simulation with UPF
    EDUCATION REQUIREMENTS
    Bachelor degree in Electrical Engineering or related area, MSEE is preferred
    YEARS OF EXPERIENCE REQUIREMENT
    2 years or above experiences in ASIC/complex SoC verification.
    QUALIFICATION:
    KEY KNOWLEDGE, SKILLS AND ABBILITIES REQUIRED
    o Has strong skill of the scripts languages(Python/Makefile/Perl), and has hands-on experience of SOC
    simulation ENV development
    o Familiar with HDL languages (Verilog/VHDL/SV), simulation tool-chain (IES/VCS/Questa) and testbench
    design with SV.
    o Familiar with assemble instruction sets and know how to integrate low level driver software into SOC
    architecture. Solid debugging ability on ARM processors is preferred
    o Experience of SOC designs with embedded processor and their integration with other system components
    including memory subsystems and peripherals
    o Good communication skills, will work with IP/SOC/CAD team closely
    o Hands-on experience with UVM is a plus
    o Experience related to Low Power Verification with UPF/CPF flow is a plus
    o Experience with gate level simulation is preferred

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